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Gigascale Integration Group Wins Best Paper Honors
Atlanta (June 5, 2009) — The Gigascale Integration Group, based in the School of Electrical and Computer Engineering (ECE), has won two best paper awards. The group is led by James D. Meindl, the Joseph M. Pettit Chair Professor in ECE and director of both the Microelectronics Research Center and Nanotechnology Research Center.
The group received the S.C. Sun Best Student Paper Award from the 2008 IEEE International Interconnect Technology Conference, which was held in San Francisco, Calif. last June. The award winning paper, “A 3D-IC technology with integrated microchannel cooling,” was written by D. Sekar, C. King, B. Dang, T. Spencer, H. Thacker, P. Joseph, M. Bakir, and J. Meindl and was published in the Proc. IEEE Int. Interconnect Technol. Conf., pp. 13-15 in 2008.
The paper described compact physical modeling and wafer-level batch fabrication technologies of advanced cooling technologies for 3D stack of high-performance chips. In particular, this paper reports, for the first time, the integration of electrical through-silicon vias with monolithic microchannel heat sink in 3D stack. The demonstrated technologies enable the liquid cooling of each chip in the stack. The reduced thermal resistance offered by microchannel cooling enables substantial improvement of clock frequency as well as reduced power dissipation for each chip in the 3D stack.
Dr. Meindl’s group also received the winning paper award of the Motorola Electronic Packaging Fellowship from the 2008 Electronic Components and Technology Conference (ECTC). The conference was held in Lake Buena Vista, Fla. The award winning paper, “3D stacking of chips with electrical and microfluidic I/O interconnects,” was written by C. King, D. Sekar, M. Bakir, B. Dang, J. Pikarsky, and J. Meindl and was published in the Proc. Electronic Components and Technol. Conf., pp. 1-7 in 2008.
This paper described low-cost chip input/output interconnect and assembly technologies to enable the “routing” of electrical and fluidic networks in a 3D stack of chips. This is important because it enables, for the first time, the ability to deliver
a coolant from the system motherboard directly to each silicon die in the stack to reject heat. These technologies offer significant cost, form factor, and performance benefits over “typical” fluidic delivery methods.
School of Electrical and Computer Engineering
Gigascale Integration Group
Georgia Institute of Technology
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